Polysilicon is widely used in the manufacture of semiconductor devices. Typically, polysilicon is deposited on silicon wafers by injecting silane or dichlorosilane and hydrogen in a hot wall CVD reactor 10 as is depicted in FIG. 1 and described by T. Kamins, Polycrystalline Silicon for Integrated Circuit Applications, Kluwer Academic Publishers, 1988, pp. 12-14, herein incorporated by reference.
A hot wall chamber such as the chamber 10 illustrated in FIG. 1 is, however, problematic. For instance, during CVD processing of wafers 12, the surface of chamber 10 becomes hot enough that a thin layer of the reactant vapor forms on the walls 14 of chamber 10. As this layer becomes thicker, it may break off of walls 14 and contaminate wafers 12. Further, the formation of such a layer may deplete the reactant species such that little or no vapor deposition occurs on the wafers 12.
In response to this problem, a "cold wall" process has been developed in which a silicon wafer is placed on a heating chuck and inserted into a vacuum chamber having induction coils provided on an outside surface thereof. The heating chuck absorbs RF energy from the induction coils, indirectly heating the wafer. The walls of the vacuum tube are transparent and non-obstructive to radiant heat energy such that the walls do not absorb RF energy emitted from the induction coils. Thus, the walls of the vacuum tube are relatively cool and remain well below the reaction temperature (i.e., the temperature of the wafers). Accordingly, very little vapor deposition occurs on the walls of the vacuum chamber.
A significant limitation of the cold wall CVD reactor lies in its inability to uniformly heat each wafer. Simply applying heat in a uniform manner across a wafer results in significant temperature differences between the center and outer portions of the wafer. FIG. 2A shows a cross-sectional view of wafer 12 being heated uniformly by radiation emitted from a heat source 16 within a cold wall CVD reactor (not shown). FIG. 2B shows the typical pattern of radiative heat loss from wafer 12. The heat loss at the edge of wafer 12 is greater than heat loss of the center of wafer 12, resulting in a temperature difference between the edge and center of wafer 12. This temperature difference is illustrated graphically in FIG. 2C, where line 18 represents the temperature of wafer 12 as a function of distance across the cross-section of wafer 12 shown in FIG. 2B.
The deposition rate of a reactant gas upon wafer 12 is proportional to the temperature of wafer 12. Thus, temperature variations between the center and edge of wafer 12 will undesirably result in the deposition of a non-uniform layer of such material (i.e., a layer of non-uniform thickness). For instance, the deposition rate of polysilicon may vary 2.0-2.5 percent per degree Centigrade (see R. S. Rosler, Low Pressure CVD Production Process for Poly, Nitride, and Oxide, Solid State Technology, April 1977, pp. 63-70).
One approach to compensate for the higher heat loss at edge of a wafer is to apply more heat to the edge of the wafer by using a multi-zone heat source, as described by M. Moslehi et al, Texas Instruments Technical Journal, Vol. 9, No. 5, September, October. 1992, pp. 44-45. Unfortunately, such a technique is not completely effective. Since heat energy is not directional (i.e., it emits from a source in all directions), it is virtually impossible to direct this additional heat energy to only the edge of wafer 12. Some of the heat energy directed at the edge of wafer 12 will heat portions of wafer 12 as much as 5 mm away from the edge of wafer 12. Accordingly, there will still exist an undesirable variation in temperature between the edge and center of wafer 12.
A further problem of the cold wall CVD process is its limited processing speed. When the reactant gas is held at a low partial pressure, i.e., less than approximately 10 mTorr, its deposition rate is primarily a function of temperature. The deposition rate may be increased by increasing the partial pressure of the reactant gas. At higher partial pressures, however, the deposition rate becomes a function of not only temperature but also of the distribution pattern of the gas over the surface of the wafer. The high velocities at which the reactant gas enters the chamber, as well as the turbulence generated within the chamber due to reactant gases striking objects within the chamber, make it nearly impossible to achieve a truly laminar gas flow within the chamber. Thus, difficulties in accurately controlling the distribution pattern require the reactant gas to be held at low partial pressures in order to achieve a uniform deposition layer on wafer 12 which, in turn, undesirably limits the deposition rate.
The deposition of rate of polysilicon is typically on the order of 100-200 .ANG./min at 10 mTorr. In a typical hot wall CVD process, in which a hundred or more wafers may be simultaneously processed, such a deposition rate is acceptable. In a cold wall CVD process, however, only one wafer may be processed at a time. Accordingly, in a cold wall CVD device, a deposition rate on the order of 100-200 .ANG./min results in an unacceptably low wafer output. Thus, there is a need for a cold wall CVD device which exhibits an increased processing speed without any sacrifice in the uniformity of the deposited layer.